1. Field of the Invention
The present invention relates to a plasma display and a method for fabricating the plasma display and, more particularly, to a plasma that is appropriate as a high-definition large-sized display.
2. Description of the Related Art
An earlier plasma display, as seen in FIG. 6, is designed for an AC-type (Alternating Current). The plasma display includes front and rear glass substrates 1 and 2 that are disposed facing each other. On an inner surface of the front glass substrate 1, a plurality of transparent line electrodes 3 are arranged in parallel. The electrodes 3 are covered with a dielectric layer 4 on which a transparent protecting layer 5 is formed. Disposed on an inner surface of the rear glass substrate 2 at right angles with respect to the plural transparent line electrodes 3 are a plurality of address line electrodes 6 covered with a dielectric layer 7 having a high reflection ratio. A plurality of straight partitions 8 are disposed in parallel on the dielectric layer 7 between the address line electrodes 6. Discharge cells 9 defining discharge spaces are defined by the partitions 8. Red R, green G and blue B phosphors 10 are formed on each inner surface of the discharge cells 9.
The front and rear glass substrates 1 and 2 are sealed by sealant after mixture gas such as Ne—Xe and He—Xe that use Xe-resonance discharge light of 147 nm (nanometers) is injected into each of the discharge cells 9.
In the above-described plasma display, the transparent line electrodes 3 and the address line electrodes 6 are extended out of the substrates 1 and 2 and connected to terminals. By selectively applying electric voltage, discharge is selectively generated in the discharge cells 9 between the electrodes 3 and 6, thereby exciting the phosphors 10 so that the light is emitted out of the substrates 1 and 2. At this point, the exciting surface becomes the surface of the phosphors 10 facing the discharge cells 9.
In addition, the partitions 8 are formed according to the following process.
First, the address line electrodes 6 are formed and baked on the inner surface of the rear glass substrate 2 through a printing process, and then the dielectric layer 7 is deposited on the inner surface while covering the electrodes 6. The partition layer is deposited on the dielectric layer 7 and a dry film resist pattern is deposited on the partition layer 8. The partition layer, which is not covered by the dry film resist pattern, is removed through a sand blast process, thereby forming the partitions 8.
That is, glass or calcium carbide particles each having a diameter of about 20-30 μm (micrometers) are sprayed by a nozzle to etch the partition layer on which the dry film resist pattern is not formed.
After the partition layer is removed, although the dielectric layer 7 is exposed, since the dielectric layer 7 is baked and hardened, it is not etched.
As described above, as the deposition and baking processes are repeatedly performed on the glass substrate to manufacture the plasma display, the glass substrate may be deformed by the heat generated in the baking process. Therefore, it has been required to reduce the baking temperature or the number of baking process to improve the productivity.
To meet the above requirement, Japanese Patent Publication No. H8-212918 discloses a method for forming the partitions by directly etching the glass substrate. As the partitions are formed by etching the glass substrate, there is no need of performing the baking process.
As shown in FIGS. 7 and 8, however, since the partitions are first formed before the address line electrodes 6 are formed, it is difficult to form the address line electrodes 6 between the partitions.
For example, since there is a gap of about 150 μm between one-end of the partition 8a and the glass substrate, the layer thickness of the electrode paste is increased. Accordingly, the electrode pattern may be short-circuited.
The height and pitch of the partition 8 are respectively about 150 μm and 360 μm. Under the current screen printing technology, it is difficult to print the address pattern having a width of about 50 μm on the bottom between the partitions 8 as it is difficult to approach the bottom.
Therefore, there is the transcription method for transferring the electrode paste on the bottom between the partitions 8. However, this method has a problem of alignment. That is, the paste may not be transferred on the desired location.
Accordingly, photosensitivity printing electrode paste such as FODEL Ag (produced by DUPONT) is first printed on the surface, and a developing process is performed to obtain a desired address line electrode pattern 6. However, this method has also a problem.
That is, the layer thickness of the electrode paste printed on a longitudinal end portion of the partition 8 is higher by more than 2-3 times that of other portions of the partition 8. This causes the margin for the developing process to be eliminated. Namely, when the developing process is performed for the thin layer, the thick layer is not patterned, and when performed for the thick layer, the thin layer is removed from the glass substrate.